Nasdaq

GBT’s Automatic Generation of Integrated Circuits Layout Blocks (IP) Patent, Received a Notice of Allowance, Expected To Be Granted In The Next Upcoming Months

SAN DIEGO, May 16, 2023 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH) (“GBT” or the “Company”), received a notice of allowance from the United States Patent and Trademark Office with ...
Nasdaq

GBT is Developing an EDA Technology For Automatic Generation of Integrated Circuits Layout IPs

SAN DIEGO, Sept. 28, 2021 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH ) ("GBT” or the “Company”), is developing EDA (Electronic Design Automation) software technology to automate the ...
Nature

Toward an ion-based large-scale integrated circuit: design, simulation, and integration

Iontronics combines ions as information carriers with electronic-like operations, enabling the creation of ion-based integrated circuits that offer unique signal processing, chemical regulation, and ...
Business Wire

Silicon Topology Joins TSMC Design Center Alliance (DCA)

HSINCHU, Taiwan--(BUSINESS WIRE)--Silicon Topology, a Taiwan-based leading ASIC/SoC physical layout design service provider, today announced that it has joined the Design Center Alliance (DCA) of TSMC ...
China Internet Information Center

China sees increasing patent application in IC layout design

China has received 2,904 patent applications for integrated circuit layout design in the first half of this year, up 45.7 percent year on year, according to a press conference held by China's National ...
Electronic Design

How to Design a Chip for Under $1,000 (Part 1): Book Recommendations

TinyTapeout offers a course that provides an overview of basic circuit components, guiding the student through schematic, simulation, layout, back annotation, DRC, and tapeout, with the student’s ...
Semiconductor Engineering

Bringing RFIC Design And Verification Into The Modern Era

For decades, developers of radio frequency (RF) chips and other analog/mixed-signal (AMS) integrated circuits (ICs) have used traditional techniques for design and verification. Most RFIC designers ...